Long and longer timeout periods are frequent goals for the ubiquitous 555 timer. Generally, this is accomplished (albeit unreliably) by unusually large electrolytic timing capacitors. However, here the long period is accomplished by a more predictable ceramic or film capacitor and substantially reduced charging current. The reduced current is generated via a transistor regulated current source, and this current is also easily adjusted. I believe that this low current source trick is new to the world.
Bill of Material
Link to Excel File
About the bill of material
This is simply a good way to go and illustrates an affordable circuit – there are many other acceptable component selections. The 555, however, must be CMOS and there are a number of vendors besides TI. 2Meg is about the highest resistance trimpot available – 5M is available, but it is a more expensive multi-turn device. The suggested relay is one of the most inexpensive available – most relays in this category have a 33mA coil that is easily driven by the 555. The transistor may be any high hFE PNP device.
The timing capacitor
I have always mistrusted electrolytic capacitors for extended timing applications – this is due to the inherent leakage that tends to vary from one device to another. While some electrolytics may function acceptably, not all devices will work. Other capacitors types such as film or ceramic have much lower leakage, but not nearly the capacitance of electrolytics. While 22µF is quite a high value for a ceramic capacitor, they are available and affordable – also two or more may be paralleled for even longer delays. This ceramic capacitor is available with Y5V or X7R dielectric characteristics, but the X7R has much better temperature stability and makes the timing circuit more stable.
Current source operation
The current source works much like an emitter follower that holds the base of the transistor at a fixed voltage, and the emitter fixes a voltage across a resistor. The voltage across the resistor generates the current and it is fixed because the base voltage does not change. The collector current then equals the emitter current minus the base current, and the collector current is independent of the collector voltage so as the timing capacitor charges there is no change in current.
In this circuit, the base is held at Vcc minus one diode drop, or Vcc – 620mV. Diode D1 is biased at 1mA via resistor R1. The emitter voltage is Vcc -325mV so the voltage across R2 is 325mV. If R2 is set at 1M, the emitter current = 325mV /1M = 325nA which is very low. With a transistor hFE of 100, the collector current will be very close to this or approximately 322nA – this is the current source. Note that that this current is over an order of magnitude lower than simply charging C1 via R2 directly. Due to the low current, a CMOS 555 is required. The input bias current of the bipolar 555 is typically 30nA, but may range up to 250nA so it is obvious that it is not suited for this application. In contrast, the TLC555 has a typical input bias current of 10pA – over three orders of magnitude lower than the bipolar device.
If you build this circuit and start probing around with a DMM, you will quickly learn that the voltages do not seem to add up correctly. This is due to the loading effect of the DMM in high impedance circuits – 10M is a high resistance, but not high enough to prevent instrumentation loading errors.
One interesting bit of trivia about PNP transistors is that the hFE tends to hold up even at very low current – much better than NPN transistors. As a result, the 2N5087 is well suited for the application. I substituted the 2N5087 with a 2N3906 to see what happened – it increased the timeout period by approximately 20%, thus indicating substantially higher base current as expected.
I am always learning and was surprised how low the transistor Vbe is under starved current conditions (385mV) – I had previously though that it would never drop below about 600mV. This interesting property allows it to be biased effectively by a single diode.
Of particular interest here is the linear charging slope that is characteristic of a current source charging a capacitor. The slight non-linearity is explained by the effect of the 10M oscilloscope probe resistance.
My shortcuts are visible – I used a 10µF film capacitor and an LED indicator instead of a relay. Also, I rarely put a capacitor on the reference pin (pin 5) of the 555.
Further extension of time period
Note that R2 need not be a potentiometer. A fixed resistor of 10M or 22M can potentially increase the time period by another order of magnitude. With a 10M resistor and 10µF capacitor, I measured a timeout period of approximately 40 minutes.
While perhaps not as accurate, stable or repeatable as programmable oscillator /counter ICs such as the CD4060 or the CD4541, this extended period 555 timer circuit has many useful and practical applications and makes a great lab experiment. I hope that you experimenters have as much fun as I had with this one.