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delay on circuit schematic

12V Time Delay Relay Circuit

Protect your equipments with this tiny 12V time delay relay circuit. The SMPS based power supply of these modern electronic devices is vulnerable to spikes in the mains line so it gives a time delay of one minute before applying power to the device. This prevents deleterious effects due to inrush current and spurious spikes at power on.

Inrush current at power on or power resumes after a power failure can cause unexpected damage in SMPS based power supply of electronic devices. The spurious spike in the power supply when power resumes is due to heavy magnetic flux in the distribution transformer in the mains network. If a short delay is provided, such damages can be avoided. The time delay relay circuit described here is intended for this purpose. It gives power to the device only after one to two minutes of delay after the power is switched on. The circuit is a zener controlled switch.

Capacitor C1 charges through R1 and VR. When the voltage in C1 rises above 3.1 volts, zener conducts to trigger T1. The relay connected to the collector of T1 energizes and power will be available through the common and Normally Open contacts of the relay. Relay remains latched as long as the voltage level in the mains is normal. Capacitor C2 keeps the base bias of T1 steady so that relay clicking can be avoided. Diode D1 prevents back EMF when T1 switches off. Red LED indicates the Relay On status. Delay time depends on the value of C1.

Time Delay Relay Circuit Schematic

time delay relay on circuit schematic

delay on circuit schematic

Power to the circuit can be derived from a standard 12 volt transformer with rectifier and smoothing capacitor. Use a socket to connect the TV as shown.

SMD, one of our top members has given us an alternative version of the circuit that seems to be working quite well.

SMD’s 12 volt time delay relay schematic and perfboard

Turn On Delay Video Presentation

Check out his Youtube page.

52 Comments

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  • SMD

    “There is little or no external interest in this circuit”

    You’d be surprised, just one OB truck in a broadcasting company is laced with these.

    “Altering the circuit to the first two FET’s WILL discharge the cap on start-up”

    Please then enlighten us.. Earlier on you said:

    “if the connections to the gates of T1 and T2 are reversed, the discharging components will turn ON for a brief period”

    A brief period eh? I see another time delay i that then, because if they would be connected to discharge at start up as you describe by swapping the gates of the two fets it will keep discharging C3 and the circuit won’t charge at all.

    It is so much easier to criticise than to have the imagination to design eh? We have a saying here in my coutry which is literally translated:”the best pilots are on the ground”… Or you could say:”the best swimmers are on the dry”…

    “The circuit is not an accurate timing circuit.”

    Accurate enough, more accurate than a circuit that discharges at start up.

    “The 10-turn pot is awkward to adjust”

    Maybe if you have Parkinsons disease?

    “It totally lacks ELECTRONIC ENGINEERING”

    Totally lacks, powerful words, you get off on that don’t you?

    “Before putting a circuit on the web as being a “Quality-Design”, you should ask on a forum for advice and improvements.”

    Where did I say it was a quality design?

    “This circuit is one of the worst I have seen”

    I am experienced enough to know this is also vastly exaggerated, which doesn’t make it a more reliable statement.

    “and any threats you have made to me, obviously come from someone who is not prepared to learn”

    Threats? I just said I would put this discussion up on some international fora, you feel threatened by that because you fear I will do. So you admit you feel bad about this and know you’ve been exaggerating.

  • SMD

    For such an experienced person you have made a whole list of faulty assumptions and mistakes, you could include yourself on your spot the mistake page mister. And I am totally not impressed as I repair far more advanced military and broadcast equipment, and designed far more complex circuitry as this little delay circuit.

    We send out equipment in to the harshest and most corrosive of environments and for that reason like to use different parts as in your average living room, you obviously haven’t seen much equipement outside that kind of environment.

    By your standards discarding this circuit as faulty and mistaken, even at first claiming it would not work at all just indicates your lack of creativity and vision. Also you obviously are a glass half empty kind of person, enjoying to emphasise the negative in others, while denying your own. Your acting in this thread has only lead to negative thoughts and will only aid in scaring novice designers off posting about their ideas.

    My circuit worked in the first place and only needed a little tweaking, it was even usable in the first place, hence your statements about mistakes are toatlly out of place. I just sketched the circuit up rather fast as an improvement over the utterly crappy circuit on this page. You could have just been a sport pointing out to improvements instead of immediately going the grudgeful schoolteacher route to put it up for everyone to see how faulty it is, that it is the worst and won’t work at all.

    I know what little Jack would say when he’d meet you.

    Kind regards

  • Colin Mitchell

    In an answer to your emails to me: No I won’t be removing your circuit from my website: Spot the Mistake. TalkingElectronics.com
    I get 6,000 visitors each day and the site is one of the largest electronics sites on the web.
    I have been teaching electronics for over 40 years and repaired over 35,000 electronic appliances such as TV’s amps, VCR’s etc.
    I cannot even recall replacing more than 8 or 10 high resistance resistors in that time – except for 3M3 resistors in the high voltage section of EHT section.
    I replaced a few more low resistance resistors and to say high-resistance resistors are more prone to failure is completely untrue.
    The fact that you have changed your circuit indicates it was faulty in the first place.
    I am not going into this discussion any more.
    There is little or no external interest in this circuit.
    Altering the circuit to the first two FET’s WILL discharge the cap on start-up.
    The circuit is not an accurate timing circuit.
    The 10-turn pot is awkward to adjust,
    The 10,000u is expensive and is completely unheard-of in a FET delay.
    The 10k resistors on the gates are completely out of keeping with FET designs.
    It totally lacks ELECTRONIC ENGINEERING and that’s why I have added it to the SPOT THE MISTAKE page on my website.
    I do not write under a set of initials such as “SMD” I write under my own name, I have an email address, a postal address and a phone number.
    I can be contacted to discuss any of my discussions and I have received hundreds of emails from readers who appreciate the way I have brought attention the mistakes on the web and in magazines.
    I know people get annoyed when they are exposed as having no electronics engineering experience, but the site is intended to assist in electronics design and the readership is constantly increasing.
    Before putting a circuit on the web as being a “Quality-Design”, you should ask on a forum for advice and improvements.
    This circuit is one of the worst I have seen and any threats you have made to me, obviously come from someone who is not prepared to learn.

    Colin Mitchell

  • SMD

    Latest rev. and prices attached from Mouser and Farnell mixed. These are low quantity prices, off course larger quantities are drastically cheaper!

    http://i.imgur.com/ojO5jFp.jpg

    So for less than €10 on parts you can build your own proto! That can be made cheaper with cheap electrolytic caps and a cheaper relay, some quick math tells me that should save up to 50%!!

  • SMD

    This webpage:
    http://www.talkingelectronics.com/projects/SpotMistakes/SpotMistakesP15.html

    Still contains a lot of mistakes. Even though Colin is right in certain points he seems to persist in certain things which are not correct or not mattering at all.

    Here’s the text:
    “The circuit has been designed to discharge the delay capacitor when the circuit is turned off. This is a very unusual way to design, however if the connections to the gates of T1 and T2 are reversed, the discharging components will turn ON for a brief period and discharge the electro before the timing begins.
    The delay is made up of a 10k multi-turn pot and 10,000u electrolytic. Normally a delay is made up of a high resistance and low value capacitor. The mid-point of these two components is then taken to a high impedance detecting circuit. In this case it is the gate of a FET. The 10k should be increase to 100k or higher and then the capacitor can be reduced to 100u to 220u.
    A muli-turn pot is the worst choice of pot as you don’t know where the wiper is positioned.
    The 1N4007 diodes can be changed to 1N4004 to show that 1,000v diodes are not needed.
    The value of R1 and R2 should be increased to 47k to show the surrounding circuit is high impedance.
    The 78L05 is not a LDO (Low Drop Out) Regulator.
    The designer of the circuit says “resistors of high values are less durable” What does this mean? If he means they are less reliable, it is not true. A 100k or 470k resistor is just as reliable as 10k.
    The designer suggests a 3v3 regulator. The 2N7000 requires up to 3v to turn ON when 75mA is needed. If the relay needs 100mA or more, the gate may require slightly more than 3v and the circuit will not work.
    The circuit is over-designed and uses expensive components.”

    I know he hasn’t done any testing to this circuit himself, something he accuses other people of. Not doing so appears to let mistakes slip in to his own logic.

    For one, swapping the gates of T1 and T2 WILL make it dischage at applying the main voltage, but WILL ALSO PREVENT it from charging at all!! This would make the circuit USELESS!!

    Unusual or not, this circuit WORKS!!

    Besides, even if it would work, if we have to discharge C3 at start up after it’s been halfway charged the previous time that will affect the delay time and we don’t want that in a precision delay circuit now do we?? Much better to have it reset to zero at shut down!!

    The 10mF and 10K was chosen in the prior test circuit with 2N3904 NPN transistors, these were proven not suitable, but had still the best results and largest possible delay with these R/C values. The fets indeed suffered far less from impedance problems, so as Colin says you can increase the resistance and decrease the capacitance. Thank you for clearing that up Colin! This mistake slipped in because I didn’t yet test the boundaries of my circuit. This is NOT a circuit design flaw!

    The multi turn trimmers by Bourns are an excellent choice, you know how many turns there are, so if you can count, which I reckon most people are capable of this is a fine choice and definitely the choice that wanders off least!

    As you can see Colin feels it necessary to paste the text 78L05 in the circuit diagram which says LDO. It was my intention in the first place to use an LDO, bit of nit picking to put that down to a ‘mistake’.

    2N7000, or BS170 (what I use now) switch UP TO 3Vdc, that means they have quite low Rds-on value there. The Omron relay I am using has a coil resistance of 360 ohm, 12V, that means the current that is flowing is just 33.3mA!! Another pointles point made by him. If you like then DO use 78L05 and a 6.3V capacitor!!

    Then have you ever repaired power supplies, or any circuit for that matter. It is almost always the electrolytic caps that fail, and secondly the high resistance resistors. Colin is like a tyre salesman that sells tyres, has lots of stories to tell, but has never seen one worn.

    Lastly I shall add prices to my BOM, in fact I shall update the schematic and BOM and then will prove this circuit is NOT over designed and NOT using any expensive components at all. On top of that I don’t really think people will care, we are not all building 10.000 circuit boards of these for commercial purposes, for the average electronics hobbyist it’s not an issue to pay one dollar more or less.

    Now again I want to make a deal that after the next revision of the ciruit and BOM correcting the minor points of improvement I want you to remove MY circuit from your spot the mistake page!!!

  • SMD

    Put them on perf boards, getting ready to design a little PCB…

    http://i.imgur.com/rZE7Jrz.jpg

  • SMD

    Right now I am using BS170G mosfets for T3 and T2, and the supercap is nice for extremely long delays, but for anything under 5 minutes it works fone with 50K trimmer for VR1 and a 1000uF capacitor.

    For the regulator I am using LE33CZ, which is an LDO, and can work stable with a tiny 100nF ceramic cap over the input and 2,2uF ceramic cap on the output. This then gives 3.3V out with the same pin-out as a 78xx series regulator. The 3.3V ensures C3 doesn’t charge very much further than needed to reach the threshold voltage on the gate of T3.

    Again I want to stress to use a stronger mosfet for T1, because it has to handle a relatively high drain-source current at discharging C3, plus low Rds-on is welcome too, to decrease it’s significance over the value of R3. That ensures the fastest possible discharge.

    Off course it all depends on what you want to use the circuit for and what delay times are necessary. I recommend all to first put this on a breadboard as well and optimise it to your needs before actually using it for real.

    Cheers!

  • Colin Mitchell

    The circuit has been designed to discharge the delay capacitor when the circuit is turned off. This is a very unusual way to design, however if the connections to the gates of T1 and T2 are reversed, the discharging components will turn ON for a brief period and discharge the electro before the timing begins.

    • SMD

      Here:
      http://youtu.be/yh9-lby_hf8

      And now I would like you to remove the circuit from your ‘spot the mistake’ page! And if you feel quite the man not to, then just please stay away from your keyboard for a while. You’re not being helpful at all…

      Or are you gonna criticize my camerawork too? LOL 😀

      P.S. The video shows the circuit in preliminary status built up on a breadboard of some scrap parts, just to show it works. It’ll be twice as neat the next time I build it, four times as neat in a while when it populates a little printed circuit board.

      It is connected to a 12V lab supply, but will do exactly the same trick on a couple of volts more or less, unlike many other circuits.

      It can take any kind of regulator, LDO, shunt, SMPS, Buck, you name it. It only needs to protect the capacitor from charging above it’s rated voltage, this keeps it smaller than using a 16V capacitor, plus this particular mosfet gate doesn’t like such high voltage.

      I have connected two leds to show the relay is really switching, when it goes green it switches.

      Halfway down the video I am adjusting the delay shorter, just to show the switching a few times over.

      The voltmeter shows the voltage on the + side of C3, at about 2.8Vdc the mosfet starts switching and flicks the relay. As per the 2N7000 datasheet the switching voltage on the gate (threshold voltage) can vary from specimen to specimen, this can affect the delay time. Keep that in mind, but there is plenty of room to play with.

      Also keep in mind that larger C3 values will take longer to discharge, the voltmeter in the videoshows how fast you can discharge a 10000uF capacitor to zero (over a 10 ohm resistor through a fet with about 1 ohm Rds on) after removing the supply voltage. It is pretty fast. You can get it faster by increasing the trimmer track resistance and decreasing C3, definitely true. Enough room to play with this VERY WELL WORKING CIRCUIT!!

      Enjoy!

    • SMD

      As I said, feel free to do with it as you please, but please think twice before putting up before the whole world to see that it doesn’t work. As in fact it does, and it does very well actually.

      Unusual or not, I get accusations of not working yet working circuits a lot, but see myself as someone thinking outside the box for a change. And I always hope it is appreciated instead of flamed down by persons that think out of habit!

  • SMD

    Again go and do some testing before further criticism. Obviously you lack the creativity to dig this circuit, let alone design it. You are quite a stubborn person really!

    Here’s another attempt to make YOU understand the functioning of this simple circuit:

    “T2 will turn ON and prevent T1 from receiving a voltage on the gate.”

    It is used as a pull down during ‘logic high’ (rail voltage present) So it is SUPPOSED to prevent T1 from receiving a voltage on the gate. Otherwise T1 would already discharge the delay capacitor. It would otherwise NOT CHARGE. Then after removing the rail voltage T2 will cease to do that and will allow C2 to keep T2 charged for a while in order to discharge C3. SEE THE BEAUTY AND SIMPLICITY THERE MISTER STUBORN MAN!!

    YES BEAUTY!!!

    Then your other pointless nit picking points which are just showing you are searching for points to criticize just for the sake of it…

    I don’t give a rats buttocks about the actual R/C values that are used as long as they give the desired delay time. The used components and values actually IMPROVE the possibilities. If you like feel free to change these at your own will, be free, run Forrest RUN!!

    If you use the values you are proposing it will work, but resistors of such high values are less durable (yes they are really!! Try it!) and the circuit becomes more sensitive to stray currents from moisture/dirt.

    Yaddayaddayadda diodes of 1000v are not needed, well again read the above, ‘parts I had in stock’… And no, they don’t cost more and if they do that’ll be 0.018 dollars instead of 0.017… These parts are almost too cheap to buy in common currency!

    78L05 is not LDO no, but I am using one, hence the markings are still in my schematic. That does change NOTHING about the way the circuit functions.

    Now some thank you and admitting time would be well in place.

    Over designed… well you are being overcitical!

    Can we make an agreement on that you will build and test the circuit for real before making any more blunt comments?

    • Mihai

      You should employ some hysteresis to this “BEAUTY”, otherwise the relay will chatter when threshold voltage has been reached or is about to be reached. What is the use of Gnd2 anyway?

      By the way…
      have you ever heard of digital timers? CD4541 for example. [timing from ms to hours]

      Cheers!

  • Colin Mitchell

    The designer of the circuit knows absolutely nothing about designing a circuit.
    He is typical of designers, just like D Mohankumar, who produce circuits without testing them or understanding the principles of electronics.
    The first two FETs do not discharge the timing capacitor. They are connected incorrectly.
    See my website for the original circuit and its faults.
    Here is the critique of the circuit:
    When the supply is turned ON, T2 will turn ON and prevent T1 from receiving a voltage on the gate. The wiring to the gates of these two FET’s is incorrect. The circuit does not work.
    But the design gets worse.
    The delay is made up of a 10k multiturn pot and 10,000u electrolytic. Normally a delay is made up of a high resistance and low value capacitor. The mid-point of these two components is then taken to a high impedance detecting circuit. In this case it is the gate of a FET. The 10k should be increase to 100k or higher and then the capacitor can be reduced to 100u to 220u.
    The 1N4007 diodes can be changed to 1N4004 to show that 1,000v diodes are not needed.
    The value of R1 and R2 should be increased to 47k to show the surrounding circuit is high impedance.
    The 78L05 is not a LDO (Low Dropout Regulator).
    The circuit is over-designed, using expensive components and has obviously never been tested.

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